By Kit Man Cham, Soo-Young Oh, John L. Moll
This booklet is worried with using Computer-Aided layout (CAD) within the equipment and approach improvement of Very-Large-Scale-Integrated Circuits (VLSI). The emphasis is in Metal-Oxide-Semiconductor (MOS) expertise. state of the art equipment and method improvement are provided. This booklet is meant as a reference for engineers eager about VLSI boost ment who've to unravel many gadget and technique difficulties. CAD experts also will locate this e-book precious because it discusses the association of the simula tion approach, and likewise provides many case reports the place the person applies the CAD instruments in numerous events. This ebook can be meant as a textual content or reference for graduate scholars within the box of built-in circuit fabrication. significant components of gadget physics and processing are defined and illustrated with Simulations. the fabric during this publication is end result of the a number of years of labor at the implemen tation of the simulation procedure, the refinement of actual types within the simulation courses, and the appliance of the courses to many circumstances of gadget advancements. The textual content started as courses in journals and con ference lawsuits, as weil as lecture notes for a Hewlett-Packard inner CAD direction. This publication comprises components. It starts off with an summary of the prestige of CAD in VLSI, which pointsout why CAD is key in VLSI improvement. half A offers the association of the two-dimensional simulation system.
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5 COMMENT LPCVD DEPOSITION STEP TYPE=OXID,TEMP=905,TIME=60 SAVE FILE=DL026,TYPE=B END Fig. 8 SUPREM input for the sourcejdrain profile Process Simulation 39 SOURCE/DRAIN PROFILE SIMULATION OF N-CHANNEL MOSFET LPCVD DEPOSITION ! 0 MINUTES. DEPTH ! 03 I 14 CONCENTRATION (LOG ATOMS/CC) 15 16 17 18 19 20 *--------------------------------------------------------------! * ! * ! * ! * ! * ! I .. 00 ----------------------------- ---------------------------*---*! ! * ! 40 * ! ! ! ! ----------------*--- --------- --------------------------------!
Digest, Philadelphia, pp. llO-lll, 1974. 5] J. J. Barnes and R. J. Lomax, " Two-Dimensional Finite Element Simulation of Semiconductor Devices," Electron. , 10, 8 Aug 1974, pp. 341-343. 6] P. E. Cottrell and E. M. Buturla, " Steady-state Analysis of Field Effect Transistors via the Finite Element Method," I EDM Tech. Digest, Dec 1975, pp. 51-54. 7] T. Toyabe, K. Yamaguchi, S. Asai, and M. S. Mock, "A Numerical Model of Avalanche Breakdown in MOSFETs," IEEE Trans. on Electron Devices, ED-25, July 1978, pp.
29) where the effective diffusivity Deff is assumed to be independent of 55 Process Simulation oxidant concentration C or stress as in the linear-parabolic model. Boundary conditions for Eq. 30) where F is the oxidant flux and n is a unit vector normal to the oxide surface (positive in the outward direction from the oxide bulk). The boundaries Sl, S2 and S3 are the oxide/silicon interface, free-oxide surface, and nitride boundary, respectively, as defined in Fig. 17. These non-homogeneous conditions cause the oxidant distribution at the silicon/oxide interfacetobe non-uniform when a nitride layer is involved as in Eqs.